Get familiar with the design-to-silicon flow using Colab notebooks.
SKY130 Verilog OpenLane
Run a simple inverter design thru the OpenLane] GDS to RTL flow targeting the open source SKY130 PDK .
Open in Colab Open in GitHub
GF180MCU Verilog OpenLane
Run a simple inverter design thru the OpenLane GDS to RTL flow targeting the open source GF180MCU PDK .
Open in Colab Open in GitHub
SKY130 Magic
Draw a simple mosfet for the open source SKY130 PDK using MAGIC and simulate it in an inverter circuit using PySpice .
Open in Colab Open in GitHub
SKY130 DSLX XLS OpenLane
Run a simple 1-bit adder design using the XLS high level synthesis toolkit thru the OpenLane GDS to RTL flow targeting the open source SKY130 PDK .
Open in Colab Open in GitHub
GF180MCU verilog OpenLane
Run subservient : a SERV-based SoC design thru the OpenLane GDS to RTL flow targeting the open source GF180MCU PDK .
Open in Colab Open in GitHub